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Add frdm_mcxe31b board basic support #95560
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Add frdm_mcxe31b board basic support #95560
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The following west manifest projects have changed revision in this Pull Request:
✅ All manifest checks OK Note: This message is automatically posted and updated by the Manifest GitHub Action. |
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soc/nxp/mcx/mcxe/mcxe31x/Kconfig
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config ROM_START_OFFSET | ||
default 0x1000 |
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goes in Kconfig.defconfig
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Moved.
# | ||
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if(CONFIG_NXP_MCXE31X_BOOT_HEADER) | ||
zephyr_library_sources(boot_header/boot_header.c) |
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2 space indent for cmake
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Updated.
const uint32_t *reserved5; /* Reserved */ | ||
const uint32_t *reserved6; /* Reserved */ | ||
const uint32_t *lcc_config; /* Address of LC config */ | ||
uint8_t Reserved7[216]; /* Reserved for future use */ |
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snake case not camel case
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Sorry, miss it. I have modified and use AI tool help check, there is no camel issue on boot_header files
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leds { | ||
compatible = "gpio-leds"; | ||
red_led: led_0 { |
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fix in whole PR
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Check for all the dts files, it should be there is no missed newline issue for same device level definition.
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I can still see a missing newline on line 37 and other places, Fix in the whole PR
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board testing pass on v4.2.0-3891-gd777dfa367ce, with kernel and gpio testing |
I will resolve conflict and sync the newest commit node on hal_nxp side after PR in hal_nxp side merged. |
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(fxosc), nxp_fxosc, okay) | ||
const fxosc_config_t fxosc_config = {.freqHz = NXP_FXOSC_FREQ, | ||
.workMode = NXP_FXOSC_WORKMODE, |
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have these files been put through clang-format? Because the struct here looks very odd
default y | ||
depends on DT_HAS_NXP_S32ZE_SIUL2_PINCTRL_ENABLED || DT_HAS_NXP_S32K3_SIUL2_PINCTRL_ENABLED | ||
depends on DT_HAS_NXP_S32ZE_SIUL2_PINCTRL_ENABLED || DT_HAS_NXP_S32K3_SIUL2_PINCTRL_ENABLED || \ | ||
DT_HAS_NXP_MCXE31X_SIUL2_PINCTRL_ENABLED |
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DT_HAS_NXP_MCXE31X_SIUL2_PINCTRL_ENABLED | |
DT_HAS_NXP_MCXE31X_SIUL2_PINCTRL_ENABLED |
cpus { | ||
#address-cells = <0x1>; | ||
#size-cells = <0>; | ||
core0: cpu@0 { |
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missing newline on line 15
&peripheral { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
adc_0: adc@a0000 { |
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etc. fix in whole PR
@@ -0,0 +1,10 @@ | |||
# | |||
# Copyright 2025 NXP |
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remove excess spacing from commit title
# Copyright 2025 NXP | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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config NXP_MCXE31X_BOOT_HEADER |
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BOARD_
prefix missing
/* | ||
* Copyright 2025 NXP | ||
* | ||
* SPDXLicense-Identifier: Apache-2.0 |
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needs fixing
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leds { | ||
compatible = "gpio-leds"; | ||
red_led: led_0 { |
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I can still see a missing newline on line 37 and other places, Fix in the whole PR
Updated hal_nxp to add mcxe31x pinctrl.h Signed-off-by: Lucien Zhao <[email protected]>
- add clock_init function to initialize clock sources according devicetree settings - finish basic clock api function Signed-off-by: Lucien Zhao <[email protected]>
- adapt for mcxe31x series - due to some bit defined in header files add some conditional macro to separate Signed-off-by: Lucien Zhao <[email protected]>
- add binding files: nxp,mcxe31x-siul2-pinctrl.yaml - Enable PINCTRL_NXP_SIUL2 when nxp,mcxe31x-siul2-pinctrl is ok Signed-off-by: Lucien Zhao <[email protected]>
- create 'mcxe' as family and 'mcxe31x' as series - add pinctrl_soc.h - add soc.c/.h to do some soc level initialization - add ecc initialization in mcxe31x_soc_initialization.S Signed-off-by: Lucien Zhao <[email protected]>
- Generate a full devices device tree file - Use specific_part.dtsi + full_devices.dtsi way to desribe all devices Signed-off-by: Lucien Zhao <[email protected]>
- support XIP way to boot - add board doc and picture - enable cases below: hello_world/blinky/button/ philosophers/synchronization/ gpio_basic_api Signed-off-by: Lucien Zhao <[email protected]>
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@lucien-nxp I merged the HAL side PR and updated this PR for you. |
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hello_world/blinky/button/philosophers/synchronization